In the conventional boost PFC circuits, the loss of rectifying bridge becomes one of the main losses of the switching power supply. Since the requirements on the power supply efficiency are more and more critical, the bridgeless boost topology deriving from the conventional boost PFC circuit has gradually become the focus of the R&D. The bridgeless boost omits the rectifying bridge in the front stage of the boost PFC circuit; decreases the loss of a diode; and increases the efficiency. And the H-bridge circuit belongs to one kind of bridgeless boost topologies suitable for the medium power and large power applications (please refer to FIG. 1). In FIG. 1, the bridgeless circuit receives the input voltage Vin, generates the output voltage Vo, and includes diodes D1-D4, switches Q1-Q2, inductor L and an output capacitor CB. The bridgeless circuit can be used as a power factor correction (PFC) circuit.
In the applications for the medium and small power occasions, the conventional boost PFC topology as shown in FIG. 3 is widely applied due to its simple configuration, better stability and smaller switch stress. Under the critical continuous current mode (or continuous conductive mode, CCM), the current of the inductor L is decreased to zero before the switch S1 e.g. MOSFET is turned on. Since the current flowing through the rectifying diode (D6) is also zero, there is no reverse recovery loss of the rectifying diode, and the efficiency in this mode is high. The PFC circuit will adjust the amplitudes of the inductor current (the triangle waves in FIG. 2) to make the average current of the inductor (the average input current in FIG. 2) be a sinusoidal wave.
FIG. 3 shows the conventional boost PFC circuit and a method of sensing and measuring the voltage of the auxiliary winding NAUX of the boost inductor L is usually employed to judge the zero-crossing timing of the inductor current so as to realize the critical CCM controlling thereof. The polarity of the auxiliary winding is reversed to the polarity of the inductor. The voltage of the auxiliary winding is negative and is proportional to the amplitude of rectified AC voltage when the switch S1 is turned on. The voltage of the auxiliary winding is positive and is proportional to a difference between the output voltage and the rectified AC voltage amplitude when S1 is turned off. The output parasitic capacitance of S1 is resonant with the boost inductor when the inductor current reaches zero. Then the voltage of the auxiliary winding decreases due to the resonance. A signal for turning on S1 generates when the voltage of the auxiliary winding is lower than a threshold voltage (e.g. a voltage set up by the IC FAN7592) so as to realize the critical CCM controlling. This kind of method can be employed by many ICs, e.g., L6561, FAN7528, NCP1606, UCC38050 etc. In FIG. 3, the PFC circuit receives an input voltage Vin, generates an output voltage Vo, and includes diodes D1-D6, resistors R1-R6 and RZCD, switch S1, IC FAN7529 (having terminals MOT, COMP, GND, CS, INV, ZCD and VCC), inductor L1, auxiliary winding NAUX and capacitors C1-C2 and Co, wherein GND is the grounded terminal.
FIGS. 4(a)-4(b) are schematic circuit diagrams showing the operating status of the H-bridge circuit during the positive half-cycle and the negative half-cycle of the input voltage Vin respectively. The elements included in FIGS. 4(a)-4(b) are the same as those of FIG. 1. L, D1, D4, Q1, Q2 and CB form a boost circuit when the input voltage is in its positive half-cycle. The current flows through L, Q1 and Q2 and then returns when Q1 turns on. While the current flows through L, D1, CB, and D4 and then returns when Q1 turns off. L, D2, Q1, Q2, D3 and CB form another boost circuit when the input voltage is in its negative half-cycle. During the negative half-cycle, the current flows through L, Q1 and Q2 and then returns when Q2 turns on, while the current flows through L, D3, CB and D2 and then returns when Q2 turns off. The currents flow through L, Q1 and Q2 are in reverse directions when they are in the positive and the negative half-cycles. Due to that D3 and D4 clamp the AC power source Vin to the output capacitor CB of the boost circuit, the common mode noise, which is the same as the conventional boost PFC circuit, could be obtained. Since the current flows through only two semiconductor elements during a switch period, the conduction loss is decreased.
FIG. 5 is a schematic circuit diagram of an H-bridge circuit operating under the critical CCM via employing current transformers (CT). Except for a portion which is the same as that of FIG. 1, it further includes an RS flip-flop, a comparator, an error amplifier (EA) and two CTs CT1-CT2. Since the H-bridge circuit has different current loops during the positive and negative half-cycles of the input voltage, the two CTs CT1-CT2 must be used to sample the inductor current to turn on the switches when the inductor current is zero so as to realize the critical CCM controlling. The turn-off timing of the switches (Q1 or Q2) is determined by the ramp signal and the output signal Vcomp of the error amplifier EA.
FIG. 6 shows the waveforms of the controlling signals of the circuit as shown in FIG. 5, which includes the inductor current (signal), CT signal, the ramp signal, Q1 driving (signal) and Q2 driving (signal). Because the inductor current signal is sampled through the CT, its amplitude is varied according to the high/low of the input AC voltage and the light/heavy of the output load. The inductor current signal is easy to be interfered by the noise when the amplitude of inductor current is quite small such that the turn-on of the switch produces error implementation and the zero-current switching (ZCS) condition is lost. When the input voltage is quite high, the descending slope of the inductor current is smooth. And because the measuring threshold value is quite small, the switch is turned on before the inductor current decreases to zero, which will increase the turn-on loss.
Keeping the drawbacks of the prior arts in mind, and employing experiments and research full-heartily and persistently, the applicants finally conceived a bridgeless power factor correction circuit for a critical CCM and a controlling method thereof.